Digione signature

A new DigiOne (signature) is coming soon


1 Clocks are changed to NDK SDA (lower jitter)
2. All important bypass capacitors are now film
3. 2 power inputs , one for “dirty side” and one for “clean side” . Dirty side input is 5V (2.5A for RPI) and clean side 5-18V (75ma) allowing even batteries to be used
4. Clean side has now a supercap for plenty of power on board.

Let me know if you have questions


I wish I knew about this before as only bought a Digione last month :cry:

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The 2 units are not at the same price point.

DigiOne signature is more expensive , will release all info sometimes this week/beginning of next week

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What, the signature is cheaper - beauty I’ll have 2 :stuck_out_tongue_winking_eye:

Johan, I wasn’t trying to have in my previous post, just being silly. Appreciate the new Signature will be a step-up both in SQ & costing (off course they both go hand-in-hand).

Looking forward to seeing the info :+1:

And a USBridge Signature at some point?

That looks good. I can’t wait to read how the performance will be compared to the ‘normal’ DigiOne.

A trade in program or a discount for existing DigiOne owners would be nice. :sunglasses:


with regard to the lower jitter clocks, what measurable improvement does this make to the jitter on the USB output data? I thought this was already very low to start with?



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The DigiOne is SPDIF output only - BNC and RCA digital coax.

Correct, that will teach me to post just before bedtime (and I do have a Digione too)! @allo.com The question still stands, with regard to the lower jitter clocks, what measurable improvement does this make to the jitter on the SPDIF output data? I thought this was already very low to start with?

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Yup it was already low but lower is always nice too :slightly_smiling_face:

This might be more important with an SPDIF source than USB - unless you have an Ayre QX-5 Twenty: “Ayre has a patent-pending method to create an asynchronous S/PDIF input stage that works with any audio transport and doesn’t require a proprietary system with an extra clock signal.”

So if your SPDIF receiver is asynchronous (ie the data is buffered then clocked out using the receivers clock), the source jitter is irrelevant?

It would vary DAC to DAC I guess. Probably a discussion to be had with your DAC’s designer.

Just trying to work out what to upgrade to improve things. Currently, Digione feeds a Chord Mojo and I understood that Chord DACs were asynchronous and therefore immune to expected jitter levels. No point improving the source jitter under these circumstances.

Understood. It would be very easy to be happy with the original DigiOne, especially with Rob Watt’s DPLL code for jitter reduction.

We are measuring less than 400fs of jitter on the buffer.

However every noise measured on the system has come down. Every buffer , flip flop noise is now measured in uV instead of mV.

I am very confident that in most systems you will hear a difference.

Also note that now DigiOne is made out of 2 boards , one is for “dirty side” and one for “clean side”. In fact we increase the size of the PCB about 220%

With all the extra space we were able to add lots of capacitance, filters etc that make the noise in every rail to decrease . (in some cases dramatically )

At last , using batteries you are making the “clean side” galvanically isolated from the mains. That can make big difference for some systems


Does it mean that the former case “acrylic” would not fit anymore ?

Old acrylic/alu casing will not fit unfortunately.

We are working on being able to change only the mid layer on alu case…will post more info as they come

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any AES output option?

Only BNC and Coaxial